Supported Buses

Depending on the particular processor, Digital UNIX Version 4.0 supports the following buses:

• PCI

• ISA

• EISA

• Futurebus+

• SCSI

• TURBOchannel

• XMI

• VME

PCI Bus

The Peripheral Component Interconnect Local Bus (PCI) is an open, high-performance 32-bit or 64-bit synchronous bus with multiplexed address and data lines, and numerous compatible hardware implementations. Table 6-1 lists the Digital processors that support the PCI Bus.

Most Digital processors that support the PCI bus support a PCI frequency of 33 MHz and a transfer rate of 132 MB per second. However, the AlphaStation 600 has 2 different types of PCI slots:

• 32-bit slots with a PCI frequency of 33Mhz and a transfer rate of 132 MB per second.

• 64-bit slots with a PCI frequency of 33Mhz and a transfer rate of 264 MB per second. [64-bit slots can also hold 32-bit option cards, but will only run at 132 MB per second.]

Table 6-2 provides a list of some of the PCI bus adapters and interconnects that are available both from Digital and third-party vendors. For more specific information on supported PCI bus adapters and interconnects in Digital UNIX Version 4.0, see the SPD. Note that because of the open nature of the PCI bus, Digital does not control the development and availability of adapters.

For more information on the PCI bus, see the PCI Local Bus Specification Revision 2.0 and the PCI to PCI Bridge Architecture Specification.

Redundant Array of Independent Disks (RAID)

See the section called Redundant Array of Independent Disks for information on PCI support for RAID, which is supported by PCI and EISA buses.

ISA Bus

The Industry Standard Architecture (ISA) bus is an open, 8-bit (PC and XT) or 16-bit (AT) asymmetrical I/O channel with numerous compatible hardware implementations and, as Table 6-1 indicates, is supported on the AlphaStation 200 and 400 series processors and on the AlphaServer 400 series processors. Digital UNIX Version 4.0 supports the high-speed ISA bus implementation that is completely separate from the system bus and allows data transfer rates at a bandwidth of up to 33 MB per second, supports a 16 MB address space and 8 DMA channels.

Table 6-3 illustrates the frequency and transfer rate for various Digital processors that support the ISA bus.

Table 6-4 provides a list of the ISA bus adapters and interconnects that are available both from Digital and third-party vendors. For more specific information on supported ISA bus adapters and interconnects in Digital UNIX Version 4.0, see the SPD.

For more specific information on supported ISA adapters and interconnects in Digital UNIX Version 4.0, see the Software Product Description.

EISA Bus

The Extended Industry Standard Architecture (EISA) bus is an open, 32-bit, asymmetrical I/O channel with numerous compatible hardware implementations and, as Table 6-1 indicates, is supported on variety of Digital processors. Digital UNIX Version 4.0 supports the high-speed EISA bus implementation that is completely separate from the system bus and allows data transfer rates at a bandwidth of up to 33 MB per second, supports a 4 GB address space, 8 DMA channels, and is backward compatible with the Industry Standard Architecture (ISA) bus.

The Digital processors that support the EISA bus support an EISA frequency of 8.33 MHz and a transfer rate of 33 MB per second.

Table 6-5 provides a list of the EISA bus adapters and interconnects that are available both from Digital and third-party vendors. For more specific information on supported EISA bus adapters and interconnects in Digital UNIX Version 4.0, see the SPD.

Note that in general, all ISA options can be used on an EISA bus system.

For more specific information on supported EISA adapters and interconnects in Digital UNIX Version 4.0, see the SPD. See the section called Redundant Array of Independent Disks for information on the redundant array of independent disks (RAID) feature, which is supported by both PCI and EISA buses.

Redundant Array of Independent Disks

The Redundant Array of Independent Disks (RAID) enhances I/O performance and reliability by supporting such features as disk shadowing and the breaking up of data between several disks (called striping). Digital UNIX Version 4.0 supports an EISA RAID controller, SWXCR-E, and a PCI RAID controller, SWXCR-P. On these controllers, devices represent themselves to the operating system as standard re disks. For more information on re devices, see the re(7) reference page.

All RAID controllers support various levels of shadowing and striping, ranging from 0 to 7. The EISA and PCI RAID controllers support RAID levels 0, 1, 5, and 6, with level 6 being vendor-specific.

Support consists of the following:

• Level 0

  Striping without redundancy

• Level 1

  Shadowing

• Level 5

  Striping and parity

• Level 6

  Striping without redundancy and shadowing (level 0 + level 1)

• JBOD − Just a Bunch of Disks

  The SWXCR series controller works like a regular disk controller; no RAID functionality is enabled.

Futurebus+

Futurebus+ is an open bus, designed by the IEEE 896 committee, whose architecture and interfaces are publicly documented, and that is independent of any underlying architecture. It has broad-base, cross-industry support; very high throughput (the maximum rate for 64-bit bandwidth is 160 MB per second; for the 128-bit bandwidth, 180 MB per second); and, as Table 6-1 indicates, it is supported on the DEC 4000, 7000, and 10000 series processors. In addition, Futurebus+ supports a 64-bit address space and a set of control and status registers (CSRs) that provides all the necessary ability to enable or disable features; thus supporting multivendor interoperablity.

Table 6-6 provides a list of Futurebus+ adapters and interconnects that are available from both Digital and third-party vendors. For more specific information on supported Futurebus+ adapters and interconnects in Digital UNIX Version 4.0, see the SPD.

For more information on the Futurebus+ adapters and interconnects in Table 6-6, see the Alpha Systems Handbook and the SPD.

SCSI Bus

The Small Computer Systems Interface (SCSI) bus is an ANSI standard for the interconnection of computers with each other and with disks, floppies, tapes, printers, optical disks, and scanners. The SCSI standard includes all the mechanical, electrical, and functional requirements needed for these devices to interconnect.

Digital UNIX Version 4.0 supports the SCSI CAM (Common Access Method) architecture, which defines a software model that provides a standard, hardware-independent interface for SCSI devices. The hardware independence is achieved by using the Transport (XPT) and SCSI Interface Module (SIM) components of CAM. Thus, because the XPT/SIM interface is defined and standardized, users can write SCSI/CAM peripheral device drivers for a variety of devices and use the existing Digital UNIX Version 4.0 support for SCSI. For more information on SCSI/CAM, see Writing Device Drivers for the SCSI/CAM Architecture Interfaces.

Digital UNIX Version 4.0 supports fast SCSI buses (maximum transfer rate of 10 megatransfers per second) and slow SCSI buses (maximum transfer rate of 5 megatransfers per second) which can be either wide (16 bits per data unit) or narrow (8 bits per data unit).

Data transfer rates are individually negotiated with each device attached to a given SCSI bus. For example, a 4 MB per second device and a 10 MB per second device may share a fast narrow bus. When the 4 MB per second device is using the bus, the transfer rate is 4 MB per second. When the 10 MB per second device is using the bus, the transfer rate is 10 MB per second. However, when faster devices are placed on a slower bus, their transfer rate is reduced to allow for proper operation in that slower environment.

Note that the speed of the SCSI bus is a function of cable length, with slow, single-ended SCSI buses supporting a maximum cable length of 6 meters, and fast, single-ended SCSI buses supporting a maximum cable length of 3 meters. In addition, there are differential adapters (such as the DWZZA, KZTSA, or KZPSA) to increase the maximum cable length to 25 meters.

Table 6-7 illustrates the frequency and transfer rate for baseboard SCSI buses:

Table 6-8 illustrates the frequency and transfer rate for SCSI adapters:

For more specific information on supported SCSI buses in Digital UNIX Version 4.0, see the SPD.

Digital UNIX Version 4.0 also supports the following functionality on SCSI buses:

• Command Tagged Queueing

• Redundant Array of Independent Disks (RAID)

Command Tagged Queueing

Command Tagged Queueing, is supported on these processors and adapters:

• DEC 3000 series processors

• DEC 4000 series processors

• KZPAA, KZPBA, KZPSA, KZPSM, KZPDA, KZTSA

• Adaptec 174X

• PMAZB, PMAZC

Redundant Array of Independent Disks

The Redundant Array of Independent Disks (RAID) enhances I/O performance and reliability by supporting such things as disk shadowing and the breaking up of data between several disks (called striping). Digital UNIX Version 4.0 supports two SCSI RAID controllers (HSZ10 and HSZ40) whose devices present themselves to the operating system as standard SCSI disks.

All RAID controllers support various levels of shadowing and striping, ranging from 0 to 5. The SCSI RAID controllers support RAID levels 0, 1, and 5, with level 3 supported on controllers that can support disk access to logical block sectors of 512 bytes.

Support consists of the following:

• Level 0

  Striping without redundancy

• Level 1

  Shadowing

• Level 3

  Striping with dedicated parity drive

• Level 5

  Striping and parity

TURBOchannel Bus

The TURBOchannel bus is a synchronous, 32-bit, asymmetrical I/O channel that can be operated at any fixed frequency in the range 12.5 MHz to 25 MHz and, as Table 6-1 indicates, is supported on DEC 3000 series processors. It is also an open bus, developed by Digital, whose architecture and interfaces are publicly documented.

At 12.5 MHz, the peak data rate is 50 MB per second. At 25 MHz, the peak data rate is 100 MB per second.

Table 6-9 illustrates the frequency and transfer rate for various DEC 3000 series processors that support the TURBOchannel bus.

Table 6-10 provides a list of some of the TURBOchannel adapters and interconnects that are available from both Digital and third-party vendors.

XMI Bus

The XMI bus is a 64-bit wide parallel bus that can sustain a 100 MB per second bandwidth in a single processor configuration, and, as Table 6-1 indicates, is supported on the DEC 7000, 8000, and 10000 series processors. The bandwidth is exclusive of addressing overhead; the XMI bus can transmit 100 MB per second of data.

The XMI bus implements a "pended protocol" design so that the bus does not stall between requests and transmissions of data. Several transactions can be in progress at a given time. Bus cycles not used by the requesting device are available to other devices on the bus. Arbitration and data transfers occur simultaneously, with multiplexed data and address lines. These design features are particularly significant when a combination of multiple devices has a wider bandwidth than the bus itself.

Table 6-11 provides a list of XMI adapters and interconnects. For more specific information on supported XMI adapters and interconnects in Digital UNIX Version 4.0, see the SPD.

CI and KDM Controllers

The Computer Interconnect (CI) and KDM controllers, supported on the XMI bus of the DEC 7000, 8000, and 10000 series processors, interconnect multiple CPUs with various RA disks and TA tapes. The CI, through the CIXCD-AX adapter, allows DEC 7000, 8000, and 10000 series processors to connect to Hierarchical Storage Controllers (HSCs), which in turn are attached to various RA disks and TA tapes.

The maximum transfer rate for the CI is 70 MB per second per channel and Digital UNIX supports two channels. The CI driver will automatically detect the presence of multiple channels and alternate between them to improve maximum throughput.

The KDM controller allows DEC 7000, 8000, and 10000 series processors to connect directly to RA or TA devices without having to use a CI or HSCs.

In both CI and KDM environments, the RA devices are capable of operating on a large number of requests at the same time. This allows for improved performance due to increased "pipelining," and the overlapping of operations.

VME Bus

Digital UNIX includes a generic VME interface layer that provides customers with a consistent interface to VME devices across Alpha AXP workstation and server platforms. Currently, VME adapters are only supported on the TURBOchannel bus. To use the VME interface layer to write VMEbus device drivers, you must have the Digital UNIX TURBOchannel/VME Adapter Driver Version 2.0 software (Software Product Description 48.50.00) and its required processor and/or hardware configurations (Software Support Addendum 48.50.00-A).

For more information on VME Bus characteristics, consult the release notes.